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HM413 CAMAC FERAbus Histogramming Memory
The histogramming memory has a length of 32,768 channels and a capacity of 16,777,215 counts per channel (24 bits). It can be configured by CAMAC commands to histogram two 16,384-channel ADCs, four 8192-channel ADCs, eight 4096-channel ADCs, sixteen 2048-channel ADCs, or thirty-two 1024-channel ADCs. CAMAC commands assign the memory segments to histogram particular ADCs on the basis of the Virtual Station Number of the ADC module and the Subaddress of each ADC within the module. Depending on the number of bits delivered by the ADCs, each Model HM413 serves all ADCs located in one or two ADC modules. The Model HM413 supports all CAMAC ADCs that provide the standard FERAbus control and data output formats, as defined in the ECL Inputs/Outputs section of the Model HM413 specifications. This includes the CAMAC/FERAbus series of ORTEC ADCs and the LeCroy 4300B 16-Input ADC. All ADCs must operate in the zero-suppressed readout mode in order to provide the Virtual Station Number, the Subaddress, and the Header Word that the Model HM413 uses to identify the assigned ADCs. The Model HM413 supports both the Singles and Coincidence modes featured in the ORTEC FERAbus ADCs. The LeCroy 4300B operates only in the Coincidence mode.In the Monitor mode, the Model HM413 simply listens to the ADC readouts occurring on the FERAbus, while the LeCroy 4301 acts as the readout controller for the list-mode readout (Fig. 1a). The WST (Write Strobe) signal on the ECL Control Bus causes the Model HM413 to read each word on the ECL Data Bus into a fast FIFO memory. This buffer memory allows the Model HM413 to track the readout of a crate full of ADCs at 100 ns per word. The Model HM413 continuously unloads the FIFO memory, and histograms only the data corresponding to its assigned ADCs. In the Readout Control mode, the Model HM413 acts as the readout controller (Fig. 1b). This mode is used for histogramming the singles spectra from multiple ADCs. ADC data acquisition can be either gated by the master GATE, or ungated. The GAI gate inputs of the Model HM413 allow ECL, fast negative NIM, TTL, or slow positive NIM logic signals to be used for the master GATE input. When an ADC has data ready for readout, it generates a Readout Request (REQ) on the ECL Control Bus. The Model HM413 enables the readout by sending a Readout (REO) Signal, via a twisted-pair cable, to the Readout Enable (REN) input of the first ADC in the readout loop. The Model HM413 reads the data from the ADC in the same way as in the Monitor mode, except that the Model HM413 accepts and generates the handshake signals that control the data transfer. When the ADC has finished its readout, it sends a PASS signal to the REN input of the next ADC. If the next ADC is not requesting a readout, it delivers a PASS signal to the REN input of the following ADC. The PASS output from the last ADC is sent to the CLI input of the Model HM413 to generate a Clear (CLR) signal on the ECL Control Bus. The CLR signal releases all ADCs to accept the next event. The CLI input connection is not required with ORTEC ADCs operating in the Singles mode, but is required for the Coincidence mode. Use of the CLI signal is mandatory for the LeCroy 4300B ADC.CAMAC controls are provided for starting and stopping the histogramming process, for reading the contents of a selected memory segment, and for erasing the spectral data in the entire memory. These functions can be executed without interfering with the continuous operation of the FERAbus readout, providing the F(26)·A(1) and F(24)·A(1) commands are used to start and stop data acquisition. When it is necessary to synchronize the live-time clocks in the ADCs with the data acquisition in the Model HM413, the "I" command can be used to start and stop data acquisition simultaneously on all modules in the same crate. Front-panel LEDs indicate when the HM413 is enabled to accept data, when data is accepted for histogramming, and when a CAMAC communication is occurring. CAMAC commands are also provided for configuring the FERAbus functions.CAMAC readout of selected memory segments proceeds as a block transfer in the Q-Stop mode. For ADC identification, the first channel of a segment readout contains the Segment Number and the Virtual Station Number of the ADC. A LAM output can be used to signal the need for readout when the counts in one of the memory channels have exceeded the memory capacity. The Model HM413 automatically solves the problem of the "occasionally missing readout request" in the Coincidence mode. When a standard FERAbus system operates in the zero-suppressed readout mode, the master GATE from the readout controller (e.g., LeCroy 4301 FERA Driver) signals the ADCs to analyze the coincident events at their inputs, and to wait for a common Clear (CLR) after readout. Occasionally, all of the ADCs produce a zero response, because they fail to detect any analog input signals. In this case, no readout request is generated, and the standard readout controller will not produce the Clear signal required to release the ADCs for the next event. The Model HM413 detects this situation, and prevents lock-up by initiating a readout request 10 µs after the end of the master GATE signal. The readout controller responds to the readout request by issuing a readout command, which results in a CLR signal being generated.To facilitate making the interconnections between the FERAbus modules, the C-ECLBUS Cable Kit is recommended as a separately ordered accessory. This kit contains the cables and connectors needed for a crate full of FERAbus modules. FERAbus is a trademark of the LeCroy Corporation. ORDERING INFORMATION
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